1. Field of the Invention
The present invention concerns a semiconductor device and method of manufacture and, particularly, it relates to an interconnection structure and fabrication method.
2. Description of the Prior Art
For interconnection structures in integrated circuits (IC), a dual layer structure comprising a barrier metal and an Al alloy has been used and, as a method of manufacturing such a structure, an Al alloy layer is formed to be contiguous with a barrier metal layer such as TiW or W, in which a region for connection with an Si substrate or polycrystalline silicon, silicide region (contact hole region) and a region on an insulation film are of identical structure.
In this case, the interconnection structure has to satisfy the requirements of preventing reaction between the Al alloy and Si, thereby avoiding spiking into the Si substrate and, further, improving the close bondability with the insulation film (SiO.sub.2) as the underlying layer. However, since both improvement of the close bondability with SiO.sub.2 and generation of spiking into the Si substrate are caused if the barrier metal is readily reactive with Si, improvement in the close bondability and the prevention of spiking cannot be achieved simultaneously and a compromise between those two objectives must be made. Further, the prior art structure has the disadvantage that it often occurs that the step-coverage of the interconnection deteriorates to interrupt the interconnection if the size of the contact hole is less than 1 .mu.m.